Intel® Processor Identification and the CPUID Instruction
http://www.intel.com/assets/pdf/appnote/241618.pdf
Intel Architecture Software Developer¡¯s Manual -- Volume 2: Instruction Set Reference
http://download.intel.com/design/pentium/MANUALS/24319101.PDF
2. Detecting the CPUID Instruction
The Intel486 family and subsequent Intel processors provide a straightforward method for determining whether the processor's internal architecture is able to execute the CPUID instruction. This method uses the ID flag in bit 21 of the EFLAGS register. If software can change the value of this flag, the CPUID instruction is executable. The POPF, POPFD, PUSHF, and PUSHFD instructions are used to access the Flags in Eflags register
3. Output of the CPUID Instruction
4. Processor Serial Number4.1 Presence of Processor Serial Number
MOV EAX, 01H
CPUID
After execution of the CPUID instruction, the ECX and EDX register contains the Feature Flags. If the PSN Feature Flags, (EDX register, bit 18) equals “1”, the processor serial number feature is supported, and enabled. Otherwise, the processor serial number feature is either not supported, or disabled in a Pentium III processor.
Processor serial number (PSN) is available in Pentium III processor only. The value in this register is reserved in the Pentium 4 processor or later. On all models, use the PSN flag (returned using CPUID) to check for PSN support before accessing the feature.
4.2 Forming the 96-bit Processor Serial Number
MOV EAX, 01H
CPUID
After execution of the CPUID instruction, the EAX register contains the Processor Signature. The Processor Signature comprises the most significant 32-bits of the processor serial number.
MOV EAX, 03H
CPUID
After execution of the CPUID instruction, the EDX register contains the middle 32-bits, and the ECX register contains the least significant 32-bits of the processor serial number. Software may then concatenate the saved Processor Signature, EDX, and ECX before returning the complete 96-bit processor serial number.
